1. Field of the Invention
This invention is directed to computers and particularly families of related computer products that are rapidly evolving and adding new function. In particular the invention relates to a method and apparatus for handling non-maskable interrupts in rapidly evolving related computer products. Personal computers are such a family of products. Many of these personal computers are programmed to invoke generalized error trace routines when a non-maskable interrupt (NMI) occurs in the system. The present invention is directed to adding new error trace routines specific to new functions in new computing systems.
2. Description of Prior Art
The IBM Personal System/2 (PS/2) family of computers typically utilizes either the Disk Operating System (DOS) program or the Operating System/2 (OS/2) program as its system program. Application programs to perform word-processing functions, spreadsheet functions, database functions, etc., run on top of one of these operating system programs. In other words the application programs are written to interface with the operating system program.
The operating system program contains within it a non-maskable interrupt (NMI) trace routine that is useable across the family of PS/2 computers. When an error or fault occurs that generates an NMI, the interrupt controller notifies the system processor and invokes a generalized NMI trace routine provided by the operating system program. These NMI routines are designed to trace errors or faults in system features known as of the most recent version of the operating system program.
A problem exists in keeping the NMI routines in the operating system up to date with the rapidly evolving set of system features offered by the PS/2 computer family. New features in devices that attach to the PS/2 computers are added daily, and the PS/2 computer family itself adds models or model enhancements every few months. When an error or fault occurs during the operation of one of these new features or functions, the operating system will look to invoke an NMI routine. However if the NMI trace routine cannot recognize or take advantage of these new features, it will not be able to properly diagnose the source of the problem.
One skilled in the computing system arts will realize it is not practical to add a new NMI trace routine to the operating system on a daily or even monthly basis. The problem is thus how to deal with the need for rapidly evolving NMI routines which can keep pace with rapidly evolving computing systems.
Prior teachings do not offer a solution to this problem. The generation of non-maskable interrupts and the invoking of NMI routines is of course well known and a few examples include: (1) M. E. Dean et al, "Diagnostic Status for Non-Maskable Interrupt Arbitration," IBM Technical Disclosure Bulletin, Vol. 30, No 5, October 1987, pp. 67-68; and (2) B. O. Anthony et al, "Enhanced Hardware Error Recovery for Microprocessor," IBM Technical Disclosure Bulletin, Vol. 32, No. 5A, October 1989, pp. 441-442. The Dean et al publication teaches a program technique for initiating a diagnostic routine when an NMI occurs. The Anthony et al publication teaches a timeout sequence for forcing an NMI routine.
In addition, the invoking of error trace routines when faults occur is well-known. Some examples include: (1) K. Shiozaki et al, "Logic Tracing Apparatus," U.S. Pat. No. 4,423,508; and (2) D. R. Bourgeois et al, "Data Processing System With Self Testing and Configuration Mapping Capability," U.S. Pat. No. 4,334,307. The Shiozaki et al patent teaches hardware failure tracing apparatus that both stops memory writing in order to store data at time of error and puts a hold on memory writing so that other test programs will not inadvertently overwrite the stored error data. The Bourgeois et al patent teaches a particular power-on self-test routine for a computing system. The routine involves successively testing sections of memory and then using tested sections of memory to store test results from tests on other sections of memory and tests on I/0 devices in the computing system.
None of these publications or patents address or provide a solution to the problem of how to provide new NMI routines in an environment where computing systems are changing rapidly.